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P-1 Resistive Devices Committee

Wed., 5 April 2000
Quality Hotel
Arlington, VA

1 Committee organization and procedures

1.1 Membership and attendance
Self-introductions were made, attendance taken, and it was determined that a quorum was present.

1.2 Approval of the Agenda
The Committee unanimously accepted the Agenda as presented.

1.3 Approval of the Minutes
The Committee unanimously accepted the Minutes of the last meeting as written.

1.4 Correspondence
No correspondence was received.

ACTION ITEM -

1.5 Review of the Committee's scope

No review was needed.

1.6 Report of task groups and DSCC efforts
- Report on ESD recommendations for thick film chip resistors
- Mr. Ritchie reported on recommendations for ESD survival. The human body test model was shown. Results were shown for 0402-2512 sizes for conditions: 1.5 kR, 100 pF, 2 kV. The results imply that acceptable product is derated from 1% to 10% tolerance. Was size a factor? Sample size: 10 pieces for each size/value combination
- Mr Ritchie is to continue analysis of top ten component resistor manufacturers and provide a report based what increases in product price the users will be paying if they require ESD packaged resistors.

ACTION ITEM-- Mr Ritchie to provide report on results of additional testing and estimate cost increase

2 Old business

2.1 Lead-free issues

A discussion ensued on lead-free materials as presented by Mr. Griffith dealing with KOA Speer efforts.

2.1.1 KOA Speer lead-free technoligy roadmap
Why do we need lead-free products?
- listed as a restricted material on many customer material specifications;
- many countries naw have or will have legislation in place that prohibits or regulates the use of lead

Potential problems with changing the current solder
- reliability: must be retested for reliability;
- long term effect: nothing compares to the current solder;
- process impact: must check compatibility;
- cost: material, equipment, yield, and rework

Free solder plating technologies
- Sn-Pb current standard: excellent solderability , excellent solder joint strength, known history;
- 100% Sn, easiest lead-free solution: good solderability and good solder joint strength, but whisker growth and high reflow temperature;
- Sn-Ag, more expensive: good solderability and solder joint strength, potential whisker growth

Characteristics of various lead-free solder plating technologies
- Sn-Bi, more expensive: good solderability, but poor solder joint strength;
- Sn-Cu, higher reflow temperature: good solderability and solder joint strength

KOA Corp. Lead-free direction
- started developing lead-free flat chip resistors in June 1998;
- formally created a lead-free development dept. in November 1999;
- must analyze the following: government regulations, customer and competer trends, various plating technologies, cost impact, and most importantly, reliability

KOA Corp. lead-free roadmap
- step 1, developing a flat chip termination plating (3 options: 100% Sn, Sn-Ag, Sn-Bi, and Sn-Cu; evaluate solderability, performance, manufactureability, cost impact and reliability;
- step 2, development of lead-free wire plating for through-hole parts;
- step 3, development of lead-free lead frames and terminal plating;
- current target is 4th quarter 2000 for flat chips and 1st quarter 2001 for others;
- KOA's current process is 100% Sn: various customers using with no problems;

Conclusion
- What is your requirement?

ACTION ITEM-Insert information from SMT on lead-free materials.

3 New business

3.1 Dimensions and tolerances in millimeters for chip resistors intended for bulk feeding
The Committee felt that this issue should be addressed by the ACH. The request will be forwarded to Mr. Vandenham for action. The proposal will be attached to the Minutes.

3.2 Vice chairperson
Mr. Griffith was selected to become the Vice Chairperson.

4 Selection of next meetings

5 Adjournment
The Committee moved, seconded, and unanimously agreed to adjourn at 11:44 AM.

6 Action items

This meeting was conducted in accordance with the EIA legal guidelines and the manual of organization and procedures.

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